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Design and Implementation of a High-Speed Non-Overlapping Mealy Sequence Detector for Digital Communication
1 M. Tech I-Year, VLSI System Design, CVR College of Engineering, Hyderabad, Telangana, India. 2 B. Tech III-Year, ECE, Scient Institute of Technology, Hyderabad, Telangana, India
Published Online: September-December 2024
Pages: 01-05
With the fast progressions in innovation, the improvement of proficient and speedier communication gadgets has gotten to be vital to play down wrong communication. This requires strong blunder discovery and rectification instruments in different areas, counting advanced communication, fawning communication, managing an account, and security applications. In this work, we display the plan of a Mealy-type non-overlapping grouping locator particularly for the grouping '01111110'. The non-overlapping plan was chosen due to its capacity to reset itself after recognizing the desired arrangement, improving its pertinence in real-world scenarios. The Coarse machine was chosen for its focal points in speed and less states compared to Moore machines. The plan was executed, synthesized, and recreated utilizing Xilinx ISE 14.7 on the ZYNQ FPGA stage. Our comes about illustrate that the optimized plan accomplishes noteworthy advancements in range productivity, control utilization, and delay, making it a exceedingly compelling arrangement for advanced communication frameworks.
